Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sYUbj-00BkYI-5y for pgsql-committers@arkaria.postgresql.org; Mon, 29 Jul 2024 17:56:27 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.94.2) (envelope-from ) id 1sYUbh-001rrT-5M for pgsql-committers@arkaria.postgresql.org; Mon, 29 Jul 2024 17:56:25 +0000 Received: from makus.postgresql.org ([2001:4800:3e1:1::229]) by malur.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sYUbg-001rrL-UL for pgsql-committers@lists.postgresql.org; Mon, 29 Jul 2024 17:56:24 +0000 Received: from sss.pgh.pa.us ([68.162.161.243]) by makus.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sYUba-0024bD-Km for pgsql-committers@lists.postgresql.org; Mon, 29 Jul 2024 17:56:23 +0000 Received: from sss1.sss.pgh.pa.us (localhost [127.0.0.1]) by sss.pgh.pa.us (8.15.2/8.15.2) with ESMTP id 46THu5b42812377; Mon, 29 Jul 2024 13:56:05 -0400 From: Tom Lane To: Andres Freund cc: Heikki Linnakangas , pgsql-committers@lists.postgresql.org Subject: Re: pgsql: Fix double-release of spinlock In-reply-to: <20240729174609.jbfei3sokdobeeeo@awork3.anarazel.de> References: <2600757.1722267116@sss.pgh.pa.us> <20240729161846.kgiafbe2dtgabxgb@awork3.anarazel.de> <2802449.1722270793@sss.pgh.pa.us> <20240729164026.yurg37tej34o76uk@awork3.anarazel.de> <2803949.1722271519@sss.pgh.pa.us> <20240729174609.jbfei3sokdobeeeo@awork3.anarazel.de> Comments: In-reply-to Andres Freund message dated "Mon, 29 Jul 2024 10:46:09 -0700" MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-ID: <2812375.1722275765.1@sss.pgh.pa.us> Content-Transfer-Encoding: quoted-printable Date: Mon, 29 Jul 2024 13:56:05 -0400 Message-ID: <2812376.1722275765@sss.pgh.pa.us> List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk Andres Freund writes: > On 2024-07-29 12:45:19 -0400, Tom Lane wrote: >> Hmm, but how? > ... > I.e. the version using 2 as the locked state uses a three byte instructi= on vs > a two byte instruction before. > *If* we are worried about this, we could > a) Change the representation only for assert enabled builds, but that'd = have > ABI issues again. Agreed, that would be a very bad idea. It would for example break the case of a non-assert-enabled extension used with an assert-enabled core or vice versa, which is something we've gone out of our way to allow. > b) Instead define the spinlock to have 1 as the unlocked state and 0 as = the > locked state. That makes it a bit harder to understand that initializ= ation > is missing, compared to a dedicated state, as the first use of the sp= inlock > just blocks. This option works for me. > To make 1) b) easier to understand it might be worth changing the slock_= t > typedef to be something like > typedef struct slock_t > { > char is_free; > } slock_t; +1 How much of this would we change across platforms, and how much would be x86-only? I think there are enough people developing on ARM (e.g. Mac) now to make it worth covering that, but maybe we don't care so much about anything else. regards, tom lane