Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oQEm6-0002um-SG for pgsql-hackers@arkaria.postgresql.org; Mon, 22 Aug 2022 21:15:58 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.92) (envelope-from ) id 1oQEm5-0000FW-P2 for pgsql-hackers@arkaria.postgresql.org; Mon, 22 Aug 2022 21:15:57 +0000 Received: from magus.postgresql.org ([2a02:c0:301:0:ffff::29]) by malur.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1oQEm5-0000FM-FR for pgsql-hackers@lists.postgresql.org; Mon, 22 Aug 2022 21:15:57 +0000 Received: from mail-pg1-x532.google.com ([2607:f8b0:4864:20::532]) by magus.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1oQEm0-0000Go-MO for pgsql-hackers@postgresql.org; Mon, 22 Aug 2022 21:15:57 +0000 Received: by mail-pg1-x532.google.com with SMTP id w13so5429268pgq.7 for ; Mon, 22 Aug 2022 14:15:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc; bh=tducNTKVD1HsN4V1fCeMqheA3aH403JJKnlXWr5QpPo=; b=PNqOZS+WN+MtmDBtqTgvqBlwjl3pQQSrm/Ezm4ZWnQLQbazOkUKOi9+fS+ySWbVLAN z4QXgK1nvoj1nl5eUxIHCyrx7f7arSA/IybhV6uMMWctcTZ2GuG3u5QlWe+vHFhQVGhK dkvvJLK6Sa4ShR55gvBSYy3HADpofQTM0OmiHa4PVQ3LJD5q5V7kUQkgnWizxR7JEA2s sbe69ssnuU9WUJcYlC/xag5Dnq449kNvJpkLC0tRhM9BJAkuETO1lHj5GRsBfBsBbNGn VxeGKV/i7gWkQSevkr/a3nzf8O2jcJ4t1m62OJ1hbNK9y3c7NRWk936ccEgoQx01RGCh a0YA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc; bh=tducNTKVD1HsN4V1fCeMqheA3aH403JJKnlXWr5QpPo=; b=p60L6ZEZmTY1QdZnWm9zY3fDj2qVQsHCwtZZzKielHEobH+Adz7+0mImzy6w/e9ifA JIMFort/VeGdTWxqn9+cXG5tC8gkJPtZgOW/UFLlaGRucbW2B8M89NOrbdZ1aC8EQLyE LVqH7OF4pRTITAlLyx9n4qPQuhRiOUw6kIcZHkAlNKOE4bjTGYna+j8miMJC0mHxvTIZ N3LCf1S9oH3h0EGxh/CRjpNkdhkrhaaonSbNcO0vmhNPeKcanlIjE+D692CF//SDY9Zs 7qxNjFekyarU878fZljzRyDzohC/usBLTTomvQD2QZvVHeizVzgdbD6MBJ+BQUBigFUk GKQA== X-Gm-Message-State: ACgBeo3KGgzyL5B4Vn9Fox+enNpqEjdF5GTd5B6Dv/syPfsTni/GGYkP F0K/rkdj5OqJ3uCC/C5m990= X-Google-Smtp-Source: AA6agR44JFY3cAnObrZhWja3/TWZmoNTODxbfu5H3GGKkDgRvjdQx9XLvb1/GnIxe5qKAZBjXgJFAQ== X-Received: by 2002:a05:6a00:228c:b0:536:b82b:e427 with SMTP id f12-20020a056a00228c00b00536b82be427mr5327690pfe.17.1661202950217; Mon, 22 Aug 2022 14:15:50 -0700 (PDT) Received: from nathanxps13 ([50.47.162.83]) by smtp.gmail.com with ESMTPSA id z2-20020a170903018200b00172f1d0825esm2072909plg.113.2022.08.22.14.15.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Aug 2022 14:15:49 -0700 (PDT) Date: Mon, 22 Aug 2022 14:15:47 -0700 From: Nathan Bossart To: John Naylor Cc: Andres Freund , pgsql-hackers Subject: Re: use ARM intrinsics in pg_lfind32() where available Message-ID: <20220822211547.GA1126462@nathanxps13> References: <20220819200829.GA395728@nathanxps13> <20220819212602.brjkd6ppgbohvo6g@awork3.anarazel.de> <20220819222814.GA401294@nathanxps13> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk On Mon, Aug 22, 2022 at 11:50:35AM +0700, John Naylor wrote: > On Sat, Aug 20, 2022 at 5:28 AM Nathan Bossart wrote: >> Thanks for the pointer. GCC, Clang, and the Arm compiler all seem to >> define __ARM_NEON, so here is a patch that uses that instead. > > Is this also ever defined on 32-bit? If so, is it safe, meaning the > compiler will not emit these instructions without additional flags? > I'm wondering if __aarch64__ would be clearer on that, and if we get > windows-on-arm support as has been proposed, could also add _M_ARM64. I haven't been able to enable __ARM_NEON on 32-bit, but if it is somehow possible, we should probably add an __aarch64__ check since functions like vmaxvq_u32() do not appear to be available on 32-bit. I have been able to compile for __aarch64__ without __ARM_NEON, so it might still be a good idea to check for __ARM_NEON. So, to be safe, perhaps we should use something like the following: #if (defined(__aarch64__) || defined(__aarch64)) && defined(__ARM_NEON) > I also see #if defined(__aarch64__) || defined(__aarch64) in our > codebase already, but I'm not sure what recognizes the latter. I'm not sure what uses the latter, either. -- Nathan Bossart Amazon Web Services: https://aws.amazon.com