Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1p2FzW-0002B2-Oo for pgsql-hackers@arkaria.postgresql.org; Mon, 05 Dec 2022 18:14:59 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.92) (envelope-from ) id 1p2FzV-0005lu-Gu for pgsql-hackers@arkaria.postgresql.org; Mon, 05 Dec 2022 18:14:57 +0000 Received: from magus.postgresql.org ([2a02:c0:301:0:ffff::29]) by malur.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1p2FzU-0005lk-J8 for pgsql-hackers@lists.postgresql.org; Mon, 05 Dec 2022 18:14:57 +0000 Received: from out1-smtp.messagingengine.com ([66.111.4.25]) by magus.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1p2FzQ-0005yo-RG for pgsql-hackers@lists.postgresql.org; Mon, 05 Dec 2022 18:14:55 +0000 Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailout.nyi.internal (Postfix) with ESMTP id 4C12A5C00E4; Mon, 5 Dec 2022 13:14:51 -0500 (EST) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Mon, 05 Dec 2022 13:14:51 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=anarazel.de; h= cc:cc:content-type:date:date:from:from:in-reply-to:in-reply-to :message-id:mime-version:references:reply-to:sender:subject :subject:to:to; s=fm1; t=1670264091; x=1670350491; bh=jMO6AePLs5 da7VuSen+5+LyklesUK8vU880VR9c7mFU=; b=fFonupQaNLIAFDqr+3GkHBfnHp Ojr8IRU5kJpM5SWBNKZVJiMZxl0LZ8Vr1Z83IRxQlS/vYB1LjC0qyV1a/y/JSBFX sr29QdGQmW+7XlG2etGq67bjNhl7j8ARimBrTM2q6L+gLMbHi1Nu4lCS0I78wz11 jpC+ue0gz/PAAwB/BnVF2ueVDj0kn60ru1bkK89Bxw43cSNRMfjJkHBPrOesZMAe K/ecI+XtS3zr3O8SqU9s37UX8EYkkyZP1pV9CTcMv39eTXmGrMKtXajFUvH0lT0K JF/nismzLi2SIfK7T8Umx+GtZzHXCLUMXt5BZyr3lGGFn8rVfBNZM7yhxWJg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-type:date:date:feedback-id :feedback-id:from:from:in-reply-to:in-reply-to:message-id :mime-version:references:reply-to:sender:subject:subject:to:to :x-me-proxy:x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; t=1670264091; x=1670350491; bh=jMO6AePLs5da7VuSen+5+LyklesU K8vU880VR9c7mFU=; b=kV4MxbdV/46TBrhUiibYvrZydsIsJcv8hoO1BqHc8BPD APpwp1oxUwEoCV/v5jpt+FxegTuFl/ptxSH5FYAffpiM903uX0cpD+S/5dFSrkE1 xl1hCVr/O02VSB8ANV0aAW5VamZ2PHhY70vjA3YMlfNxa5teCiSch12Ic+l56r4t XBmVF/JzcEfHv/PSLmiKNt3A38vn4G+DMDg0ayEOyKOD2m7Re1VwqPnPx8h/tiHM j5WZyp42dgIoeCVx9Rta5jZGQH7rpfFw+/2zmVKUWq/ph2Z8FVGPzDaacpP31J85 vOSs1ASTgqFdASxVs2AadvpQLUAG9jqS0f8aWAt4sA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvhedrudeggdduudduucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhepfffhvfevuffkfhggtggujgesthdtredttddtvdenucfhrhhomheptehnughr vghsucfhrhgvuhhnugcuoegrnhgurhgvshesrghnrghrrgiivghlrdguvgeqnecuggftrf grthhtvghrnhepfeeigfeiudekueejffegteetvdevgefggeevvedvteeijeeuudejgeej jeetgfdunecuffhomhgrihhnpehmihgtrhhoshhofhhtrdgtohhmnecuvehluhhsthgvrh fuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomheprghnughrvghssegrnhgrrhgr iigvlhdruggv X-ME-Proxy: Feedback-ID: id4a34324:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Mon, 5 Dec 2022 13:14:50 -0500 (EST) Date: Mon, 5 Dec 2022 10:14:49 -0800 From: Andres Freund To: Michael Paquier Cc: Niyas Sait , Ian Lawrence Barwick , Tom Lane , Thomas Munro , Julien Rouhaud , PostgreSQL Hackers Subject: Re: [PATCH] Add native windows on arm64 support Message-ID: <20221205181449.47mhosidtmotemdl@awork3.anarazel.de> References: <271611.1661998926@sss.pgh.pa.us> <20221105183136.hfxyl5dclxdcoyih@awork3.anarazel.de> <7ff7c416-fdfe-517f-a65c-9e5bd8ff8cec@linaro.org> <8d46c46d-66d3-758b-b686-de371e0ba8ca@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk Hi, On 2022-12-05 14:12:41 +0900, Michael Paquier wrote: > With meson gaining in maturity, perhaps that's not the most urgent > thing as we will likely remove src/tools/msvc/ soon but I'd rather do > that right anyway as much as I can to avoid an incorrect state in the > tree at any time in its history. I'd actually argue that we should just not add win32 support to src/tools/msvc/. > --- a/src/include/storage/s_lock.h > +++ b/src/include/storage/s_lock.h > @@ -708,13 +708,21 @@ typedef LONG slock_t; > #define SPIN_DELAY() spin_delay() > > /* If using Visual C++ on Win64, inline assembly is unavailable. > - * Use a _mm_pause intrinsic instead of rep nop. > + * Use _mm_pause (x64) or __isb (arm64) intrinsic instead of rep nop. > */ > #if defined(_WIN64) > static __forceinline void > spin_delay(void) > { > +#ifdef _M_ARM64 > + /* > + * See spin_delay aarch64 inline assembly definition above for details > + * ref: https://learn.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics#BarrierRestrictions > + */ > + __isb(_ARM64_BARRIER_SY); > +#else > _mm_pause(); > +#endif > } > #else > static __forceinline void This looks somewhat wrong to me. We end up with some ifdefs on the function defintion level, and some others inside the function body. I think it should be either or. > diff --git a/meson.build b/meson.build > index 725e10d815..e354ad7650 100644 > --- a/meson.build > +++ b/meson.build > @@ -1944,7 +1944,13 @@ int main(void) > > elif host_cpu == 'arm' or host_cpu == 'aarch64' > > - prog = ''' > + if cc.get_id() == 'msvc' > + cdata.set('USE_ARMV8_CRC32C', false) > + cdata.set('USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK', 1) > + have_optimized_crc = true > + else > + > + prog = ''' > #include > > int main(void) Why does this need to be hardcoded? The compiler probe should just work for msvc. > @@ -1960,18 +1966,19 @@ int main(void) > } > ''' > > - if cc.links(prog, name: '__crc32cb, __crc32ch, __crc32cw, and __crc32cd without -march=armv8-a+crc', > - args: test_c_args) > - # Use ARM CRC Extension unconditionally > - cdata.set('USE_ARMV8_CRC32C', 1) > - have_optimized_crc = true > - elif cc.links(prog, name: '__crc32cb, __crc32ch, __crc32cw, and __crc32cd with -march=armv8-a+crc', > - args: test_c_args + ['-march=armv8-a+crc']) > - # Use ARM CRC Extension, with runtime check > - cflags_crc += '-march=armv8-a+crc' > - cdata.set('USE_ARMV8_CRC32C', false) > - cdata.set('USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK', 1) > - have_optimized_crc = true > + if cc.links(prog, name: '__crc32cb, __crc32ch, __crc32cw, and __crc32cd without -march=armv8-a+crc', > + args: test_c_args) > + # Use ARM CRC Extension unconditionally > + cdata.set('USE_ARMV8_CRC32C', 1) > + have_optimized_crc = true > + elif cc.links(prog, name: '__crc32cb, __crc32ch, __crc32cw, and __crc32cd with -march=armv8-a+crc', > + args: test_c_args + ['-march=armv8-a+crc']) > + # Use ARM CRC Extension, with runtime check > + cflags_crc += '-march=armv8-a+crc' > + cdata.set('USE_ARMV8_CRC32C', false) > + cdata.set('USE_ARMV8_CRC32C_WITH_RUNTIME_CHECK', 1) > + have_optimized_crc = true > + endif > endif > endif And then this reindent wouldn't be needed. Greetings, Andres Freund