Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1wUs7Y-001VLY-2c for pgsql-hackers@arkaria.postgresql.org; Wed, 03 Jun 2026 20:23:24 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.96) (envelope-from ) id 1wUs7X-003JPj-1a for pgsql-hackers@arkaria.postgresql.org; Wed, 03 Jun 2026 20:23:23 +0000 Received: from magus.postgresql.org ([2a02:c0:301:0:ffff::29]) by malur.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1wUs7X-003JPb-0e for pgsql-hackers@lists.postgresql.org; Wed, 03 Jun 2026 20:23:23 +0000 Received: from sss.pgh.pa.us ([68.162.161.243]) by magus.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1wUs7U-000000017DU-02Vt for pgsql-hackers@postgresql.org; Wed, 03 Jun 2026 20:23:22 +0000 Received: from sss1.sss.pgh.pa.us (localhost [127.0.0.1]) by sss.pgh.pa.us (8.18.1/8.18.1) with ESMTP id 653KN3he3114171; Wed, 3 Jun 2026 16:23:04 -0400 From: Tom Lane To: Tobias Bussmann cc: John Naylor , Lukas Fittl , Jakob Egger , pgsql-hackers , Andres Freund , Sandeep Thakkar Subject: Re: Broken build on macOS (Universal / Intel): cpuid instruction not available In-reply-to: <2943390.1780421880@sss.pgh.pa.us> References: <223EA201-A0E8-4A13-B220-EB903E8DF817@eggerapps.at> <871806.1778168884@sss.pgh.pa.us> <873909.1778170924@sss.pgh.pa.us> <471E4CB3-1690-4168-9A99-5F83D97C12AF@gmx.net> <15574903-87C9-478A-B2D7-CC8F4C275DBB@gmx.net> <2925608.1780411691@sss.pgh.pa.us> <2927612.1780413646@sss.pgh.pa.us> <2943390.1780421880@sss.pgh.pa.us> Comments: In-reply-to Tom Lane message dated "Tue, 02 Jun 2026 13:38:00 -0400" MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----- =_aaaaaaaaaa0" Content-ID: <3114099.1780518097.0@sss.pgh.pa.us> Date: Wed, 03 Jun 2026 16:23:03 -0400 Message-ID: <3114170.1780518183@sss.pgh.pa.us> List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk ------- =_aaaaaaaaaa0 Content-Type: text/plain; charset="us-ascii" Content-ID: <3114099.1780518097.1@sss.pgh.pa.us> Content-Transfer-Encoding: quoted-printable I wrote: > Also, the reason we manage to set USE_AVX2_WITH_RUNTIME_CHECK > in a multi-arch build is that what configure actually tests > is (a) is $host_cpu x86_64 and (b) does the compiler accept > __attribute__((target("avx2"))). On a multi-arch build, > the ARM side spits out a warning > '+avx2' is not a recognized feature for this target (ignoring feature) > but it doesn't actually fail, so configure thinks that's a success. After further contemplation, I think the best fix for this problem is to undo configure's mistake globally, not just in checksum.c. checksum.c is the only file using USE_AVX2_WITH_RUNTIME_CHECK today, but that might not be true forever. Also, I think it's pure chance that the test for that symbol succeeds in a universal build while other similar tests don't. So what the attached v2 does is to #undef USE_AVX2_WITH_RUNTIME_CHECK as well as the USE_AVX512 symbols in c.h, if we're not in fact building for x86_64 hardware. We could extend the list of things to #undef there later, if it proves necessary. The shape of this patch is partially dictated by not wanting to create problems for Munro's pending patch [1], but I think it's a reasonable solution even without that consideration. regards, tom lane [1] https://www.postgresql.org/message-id/flat/CA%2BhUKGL8Hs-phHPugrWM%3D5= dAkcT897rXyazYzLw-Szxnzgx-rA%40mail.gmail.com ------- =_aaaaaaaaaa0 Content-Type: text/x-diff; name="v2-fix-macos-universal-build.patch"; charset="us-ascii" Content-ID: <3114099.1780518097.2@sss.pgh.pa.us> Content-Description: v2-fix-macos-universal-build.patch diff --git a/src/include/c.h b/src/include/c.h index 97ed8c63f5e..23db81fa7ca 100644 --- a/src/include/c.h +++ b/src/include/c.h @@ -1340,6 +1340,17 @@ typedef struct PGAlignedXLogBlock PGAlignedXLogBlock; #if (defined(__x86_64__) || defined(_M_AMD64)) #define USE_SSE2 +#else /* ! x86_64 */ + +/* + * In "universal" macOS builds, it's possible for AVX-related symbols to + * get defined if the build host is x86_64, but we mustn't try to build + * that code when cross-compiling to aarch64. + */ +#undef USE_AVX2_WITH_RUNTIME_CHECK +#undef USE_AVX512_CRC32C_WITH_RUNTIME_CHECK +#undef USE_AVX512_POPCNT_WITH_RUNTIME_CHECK + /* * We use the Neon instructions if the compiler provides access to them (as * indicated by __ARM_NEON) and we are on aarch64. While Neon support is @@ -1348,9 +1359,10 @@ typedef struct PGAlignedXLogBlock PGAlignedXLogBlock; * could not realistically use it there without a run-time check, which seems * not worth the trouble for now. */ -#elif defined(__aarch64__) && defined(__ARM_NEON) +#if defined(__aarch64__) && defined(__ARM_NEON) #define USE_NEON #endif +#endif /* ! x86_64 */ /* ---------------------------------------------------------------- * Section 9: system-specific hacks ------- =_aaaaaaaaaa0--