From: Tom Lane <tgl@sss.pgh.pa.us>
To: Ranier Vilela <ranier.vf@gmail.com>
cc: Tomas Vondra <tomas.vondra@enterprisedb.com>,
        PostgreSQL Hackers <pgsql-hackers@lists.postgresql.org>,
        Masahiko Sawada <sawada.mshk@gmail.com>,
        John Naylor <johncnaylorls@gmail.com>
Subject: Re: suspicious valgrind reports about radixtree/tidstore on arm64
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Comments: In-reply-to Ranier Vilela <ranier.vf@gmail.com>
	message dated "Thu, 20 Jun 2024 08:50:26 -0300"
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Date: Thu, 20 Jun 2024 11:33:46 -0400
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Ranier Vilela <ranier.vf@gmail.com> writes:
> Em qua., 19 de jun. de 2024 =C3=A0s 20:52, Tom Lane <tgl@sss.pgh.pa.us> =
escreveu:
>> Hah: it's the second case.  If I patch radixtree.h as attached,
>> then x86_64 valgrind complains about
>> =3D=3D00:00:00:32.759 247596=3D=3D Conditional jump or move depends on
>> uninitialised value(s)
>> =3D=3D00:00:00:32.759 247596=3D=3D    at 0x52F668: local_ts_node_16_sea=
rch_eq
>> (radixtree.h:1018)
>> showing that it knows that the result of vector8_highbit_mask is
>> only partly defined.

> I wouldn't be surprised if *RT_NODE_16_GET_INSERTPOS*
> (src/include/lib/radixtree.h),
> does not suffer from the same problem?

Dunno, I only saw valgrind complaints in local_ts_node_16_search_eq,
and Tomas reported the same.

It seems moderately likely to me that this is a bug in aarch64
valgrind.  Still, if it is that then people will have to deal with it
for awhile yet.  It won't cost us anything meaningful to work around
it (he says, without having done actual measurements...)

			regards, tom lane