Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1p0nEa-0005CK-9r for pgsql-hackers@arkaria.postgresql.org; Thu, 01 Dec 2022 17:20:28 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.92) (envelope-from ) id 1p0nEZ-0007bv-4f for pgsql-hackers@arkaria.postgresql.org; Thu, 01 Dec 2022 17:20:27 +0000 Received: from makus.postgresql.org ([2001:4800:3e1:1::229]) by malur.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1p0nEY-0007be-Qi for pgsql-hackers@lists.postgresql.org; Thu, 01 Dec 2022 17:20:26 +0000 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by makus.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1p0nEW-0005dM-Ak for pgsql-hackers@lists.postgresql.org; Thu, 01 Dec 2022 17:20:25 +0000 Received: by mail-wr1-x42d.google.com with SMTP id bs21so3825797wrb.4 for ; Thu, 01 Dec 2022 09:20:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=/DW/gmJLE0Gkptgwwhq95hULm7zWX8xw3NVgIyfFlBE=; b=xnRHswJiO4pJ1K3Gv/Iy5e/QM5ypNv5kQiu23C+HioE4vEqIb4m7PrOzlmvlo8RmES qSqRQleUM1RZTEqYLQM2zGFcRc2fqLKZC154uZYckR8JqIsh+UNgRqdk6201jCUy3nJ+ pS9a5DHSrdZw+okJalhYT8yq3XKypewYgpKvE9x3fbvy9BAnQLWw+cedOaRKKRfOv6+S IB2OC/YM+ZzZomW+irdLXObDwlK2C5//1UVr8WDVLnTgr7cUPsmq2+gwq+XcEkoHUyDL OHR7nq3IaLF2rTQTdfmUrv56X0LGcW8A3f1h+9B4EXV/xPbhE3t6QeXz8vLy+Bo1hPwo HwSQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/DW/gmJLE0Gkptgwwhq95hULm7zWX8xw3NVgIyfFlBE=; b=ZNjV2YvHgkjIzCEKvi/Z06VOAVvX2rxNMdyWb/uw8pmN+tpNB+T3mretSEB8L/UQ5k u1YxnMshUtfnHtsJZHvuHnHoyp0koBJXrHf2XLJM+rJv5KgoskXkI2FPimlLK42l3i3u U8qXVRxwtxaGH1Fd/Kx//lh4Xsa1bMeT3ksV4rwG/naD8nUmbpJFlMLWtOrapJ8mYsOY RkyyyJXJ+oOEKgNnlDSPycMYAa2G58WF5RgvGXj+1BWtu1s9i9MvOgVCoy2e+29y32KW QILs62EBNjjwS8oyfuUoJoxzTWV7v4jwHBo5eV08oMvdNpH1qIesvEFtET799C4nrIX6 ZYHA== X-Gm-Message-State: ANoB5plGWRK/xa/x11sGqYFGX17QgG5hpr5E6OkDJewcytGzVLE9qUTs 41xQ7Fo7McW1BcPT739CN9mkLQ== X-Google-Smtp-Source: AA0mqf4ciTQEFfgyG9YnwbNOPEnZpcRH02gYnEf18/gEguxlDo0KX4UoesoKXEDaW/S9qWaHIpg7NQ== X-Received: by 2002:adf:ef44:0:b0:242:3563:e2a2 with SMTP id c4-20020adfef44000000b002423563e2a2mr3164414wrp.418.1669915223001; Thu, 01 Dec 2022 09:20:23 -0800 (PST) Received: from [192.168.1.166] ([212.228.7.114]) by smtp.gmail.com with ESMTPSA id p21-20020a1c5455000000b003b4cba4ef71sm9068554wmi.41.2022.12.01.09.20.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Dec 2022 09:20:22 -0800 (PST) Message-ID: <7ff7c416-fdfe-517f-a65c-9e5bd8ff8cec@linaro.org> Date: Thu, 1 Dec 2022 17:20:20 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH] Add native windows on arm64 support Content-Language: en-US To: Michael Paquier , Andres Freund Cc: Ian Lawrence Barwick , Tom Lane , Thomas Munro , Julien Rouhaud , PostgreSQL Hackers References: <3886822.1661905738@sss.pgh.pa.us> <20476.1661967233@sss.pgh.pa.us> <271611.1661998926@sss.pgh.pa.us> <20221105183136.hfxyl5dclxdcoyih@awork3.anarazel.de> From: Niyas Sait In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk On 07/11/2022 06:58, Michael Paquier wrote: >>> #if defined(_WIN64) >>> static __forceinline void >>> spin_delay(void) >>> { >>> +#ifdef _M_ARM64 >>> + /* >>> + * arm64 way of hinting processor for spin loops optimisations >>> + * ref: https://community.arm.com/support-forums/f/infrastructure-solutions-forum/48654/ssetoneon-faq >>> + */ >>> + __isb(_ARM64_BARRIER_SY); >>> +#else >>> _mm_pause(); >>> +#endif >>> } >>> #else >>> static __forceinline void >> >> I think we should just apply this, there seems very little risk of making >> anything worse, given the gating to _WIN64 && _M_ARM64. > > Seems so. Hmm, where does _ARM64_BARRIER_SY come from? Perhaps it > would be better to have a comment referring to it from a different > place than the forums of arm, like some actual docs? _ARM64_BARRIER_SY is defined in Microsoft Arm64 intrinsic documentation - https://learn.microsoft.com/en-us/cpp/intrinsics/arm64-intrinsics?view=msvc-170#BarrierRestrictions I couldn't find something more official for the sse2neon library part. -- Niyas