From: "Amonson, Paul D" <paul.d.amonson@intel.com>
To: Nathan Bossart <nathandbossart@gmail.com>
CC: Tom Lane <tgl@sss.pgh.pa.us>, David Rowley <dgrowleyml@gmail.com>, "Andres
 Freund" <andres@anarazel.de>, Alvaro Herrera <alvherre@alvh.no-ip.org>,
	"Shankaran, Akash" <akash.shankaran@intel.com>, Noah Misch
	<noah@leadboat.com>, Matthias van de Meent <boekewurm+postgres@gmail.com>,
	"pgsql-hackers@lists.postgresql.org" <pgsql-hackers@lists.postgresql.org>
Subject: RE: Popcount optimization using AVX512
Thread-Topic: Popcount optimization using AVX512
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Date: Thu, 28 Mar 2024 22:03:04 +0000
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Precedence: bulk

> -----Original Message-----
> From: Nathan Bossart <nathandbossart@gmail.com>
> Sent: Thursday, March 28, 2024 2:39 PM
> To: Amonson, Paul D <paul.d.amonson@intel.com>
>=20
> * The latest patch set from Paul Amonson appeared to support MSVC in the
>   meson build, but not the autoconf one.  I don't have much expertise her=
e,
>   so the v14 patch doesn't have any autoconf/meson support for MSVC, whic=
h
>   I thought might be okay for now.  IIUC we assume that 64-bit/MSVC build=
s
>   can always compile the x86_64 popcount code, but I don't know whether
>   that's safe for AVX512.

I also do not know how to integrate MSVC+Autoconf, the CI uses MSVC+Meson+N=
inja so I stuck with that.
=20
> * I think we need to verify there isn't a huge performance regression for
>   smaller arrays.  IIUC those will still require an AVX512 instruction or
>   two as well as a function call, which might add some noticeable overhea=
d.

Not considering your changes, I had already tested small buffers. At less t=
han 512 bytes there was no measurable regression (there was one extra condi=
tion check) and for 512+ bytes it moved from no regression to some gains be=
tween 512 and 4096 bytes. Assuming you introduced no extra function calls, =
it should be the same.

> I forgot to mention that I also want to understand whether we can actuall=
y assume availability of XGETBV when CPUID says we support AVX512:

You cannot assume as there are edge cases where AVX-512 was found on system=
 one during compile but it's not actually available in a kernel on a second=
 system at runtime despite the CPU actually having the hardware feature.

I will review the new patch to see if there are anything that jumps out at =
me.

Thanks,
Paul