Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q1JbX-0007xt-Ac for pgsql-hackers@arkaria.postgresql.org; Tue, 23 May 2023 04:26:35 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.92) (envelope-from ) id 1q1JbV-0006Fz-Vh for pgsql-hackers@arkaria.postgresql.org; Tue, 23 May 2023 04:26:33 +0000 Received: from magus.postgresql.org ([2a02:c0:301:0:ffff::29]) by malur.postgresql.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1q1JbV-0006Ey-Lt for pgsql-hackers@lists.postgresql.org; Tue, 23 May 2023 04:26:33 +0000 Received: from momjian.us ([72.94.173.45]) by magus.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1q1JbN-001ZGa-NX for pgsql-hackers@postgresql.org; Tue, 23 May 2023 04:26:33 +0000 Received: from bruce by momjian.us with local (Exim 4.94.2) (envelope-from ) id 1q1JbL-006rg4-Th; Tue, 23 May 2023 00:26:23 -0400 Date: Tue, 23 May 2023 00:26:23 -0400 From: Bruce Momjian To: John Naylor Cc: PostgreSQL-development Subject: Re: PG 16 draft release notes ready Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk On Tue, May 23, 2023 at 09:58:30AM +0700, John Naylor wrote: > Hi Bruce, > > > Add support for SSE2 (Streaming SIMD Extensions 2) vector operations on > x86-64 architectures (John Naylor) > > > Add support for Advanced SIMD (Single Instruction Multiple Data) (NEON) > instructions on ARM architectures (Nathan Bossart) > > Nit: It's a bit odd that SIMD is spelled out in only the Arm entry, and perhaps > expanding the abbreviations can be left out. The issue is that x86-64's SSE2 uses an embedded acronym: SSE2 (Streaming SIMD Extensions 2) so technically it is: SSE2 (Streaming (Single Instruction Multiple Data) Extensions 2 but embedded acronyms is something I wanted to avoid. ;-) > > Allow arrays searches to use vector operations on x86-64 architectures (John > Naylor) > > We can leave out the architecture here (see below). Typo: "array searches" Both fixed. > All the above seem appropriate for the "source code" section, but the following > entries might be better in the "performance" section: > > > Allow ASCII string detection to use vector operations on x86-64 architectures > (John Naylor) > > Allow JSON string processing to use vector operations on x86-64 architectures > (John Naylor) > > > > ARM? > > Arm as well. For anything using 16-byte vectors the two architectures are > equivalently supported. For all the applications, I would just say "vector" or > "SIMD". Okay, I kept "vector". I don't think moving them into performance makes sense because there I don't think this would impact user behavior or choice, and it can't be controlled. > And here maybe /processing/parsing/. Done. > > Allow xid/subxid searches to use vector operations on x86-64 architectures > (Nathan Bossart) > > When moved to the performance section, it would be something like "improve > scalability when a large number of write transactions are in progress". Uh, again, see above, this does not impact user behavior or choices. I assume this is x86-64-only. -- Bruce Momjian https://momjian.us EDB https://enterprisedb.com Only you can decide what is important to you.