Received: from malur.postgresql.org ([217.196.149.56]) by arkaria.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tI3ts-00BqEq-SG for pgsql-hackers@arkaria.postgresql.org; Mon, 02 Dec 2024 10:43:33 +0000 Received: from localhost ([127.0.0.1] helo=malur.postgresql.org) by malur.postgresql.org with esmtp (Exim 4.94.2) (envelope-from ) id 1tI3sr-00G5gh-CH for pgsql-hackers@arkaria.postgresql.org; Mon, 02 Dec 2024 10:42:30 +0000 Received: from makus.postgresql.org ([2001:4800:3e1:1::229]) by malur.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tI3sq-00G5gY-Uf for pgsql-hackers@lists.postgresql.org; Mon, 02 Dec 2024 10:42:30 +0000 Received: from lahtoruutu.iki.fi ([2a0b:5c81:1c1::37]) by makus.postgresql.org with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tI3so-000dOp-IY for pgsql-hackers@postgresql.org; Mon, 02 Dec 2024 10:42:28 +0000 Received: from [192.168.1.110] (dsl-hkibng22-50ddb7-241.dhcp.inet.fi [80.221.183.241]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: hlinnaka) by lahtoruutu.iki.fi (Postfix) with ESMTPSA id 4Y20j83Kvwz49Q1F; Mon, 2 Dec 2024 12:42:20 +0200 (EET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iki.fi; s=lahtoruutu; t=1733136142; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EaiGlklL59P7IFxY3Q4C7obHcybotbmSeiCSdYThWWI=; b=JIfuqqw1aOy7Nv0KgGs0o9LUOOvSjKhfK8qeONrMop+6SdBllJLHLeMtNgkY+SHBPrEbQe jB4+W8SDoCXzQZzUHCjjrs4TlZGjHYs6dLgIKMPB8wYRddzNeuwVJgVY00QBlxz9UgPL+G saOST84lGypBnLHQffqLpCXUaJbYByB8uzJ+nHLhfo+LO5GcxQet1//esKQfXXSlN1uPIi l+pEXNOsnWkGpHRi8dHw9xaY30GVVD4hE/YbJ2qQSTHcMlsqkjgYdPnk75VKFkYLXLqarV UtkO5rYniJaJT6VJfCNd1VcOAJdxk8oI/daGYzeQxtNIlC7BSZCcal4ePTJNrA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=iki.fi; s=lahtoruutu; t=1733136142; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=EaiGlklL59P7IFxY3Q4C7obHcybotbmSeiCSdYThWWI=; b=pNypJ5/oeOBfIPF83E8hRdNwxtGtzeDMYKvHlltYmF3/osSh3MiYYv0hoQIKRbSfCH0RFr MuVEa70hqaxxFnhSuxQFgO5qvNYkjHapL3n9U2pCJCu0oP+oDmXSdwdcb/ifW0R/7NTK9+ +dOcI1ODixlaHJNcPhJACEn0R+NlC0uW8jJA986tk9qmSYTC6/gnbw/wd5pGiSRNWiiY9v ySyV2yqNa38jT6Ml9L//S6HcHnQF0IPw+luE2agPjMooZTL5RekVUU52E/YFjIb1gAjpuN bkg0ypIVy1kh5qGAQnLsggrfdFxQMD/UrNlAVGbDdwX6kHUpNNHbfAoIbb5HQw== ARC-Authentication-Results: i=1; ORIGINATING; auth=pass smtp.auth=hlinnaka smtp.mailfrom=hlinnaka@iki.fi ARC-Seal: i=1; s=lahtoruutu; d=iki.fi; t=1733136142; a=rsa-sha256; cv=none; b=BmF8vMDte0X7QQv4xnH4uoduP6UJQlcllGINdwYKoYsEcv5+Nu2+rJgtcnJihBsdXXI7nj qFa7x+VS+0VNHReT5BkzFpM71Of+seQRDo1956qCXX0ue1+fFuSPUH/ACIqcujgCPntt8t Qgg735BeB94oQ5h+yqsKbB8vwutYUXj1vd0jRWBa+F82B/4EKLl4um682/QId8VjOazJXJ 7gi4/Ott6ry7BC+JIVixBXOSX/A66GUjCiyVJMshbj/6mnhMswVqqtMKgJS9DpqPnsffFJ Q6US2BNLdxX7V0HDJlfTQY+7kK+DCbxd+ESg5L8F+qFcpwB9V3eDn6sL9u6rqw== Message-ID: Date: Mon, 2 Dec 2024 12:42:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Interrupts vs signals To: Thomas Munro Cc: Michael Paquier , Robert Haas , Fujii Masao , pgsql-hackers , Andres Freund References: <3b996d73-2a10-4072-a58d-0386af0cbb78@iki.fi> <46f047a1-bfd5-406a-a0f3-97205d9529ad@iki.fi> <476672e7-62f1-4cab-a822-f3a8e949dd3f@iki.fi> <391abe21-413e-4d91-a650-b663af49500c@iki.fi> <8a0ff52f-de8e-49d2-a3af-ea5bc12f5b97@iki.fi> Content-Language: en-US From: Heikki Linnakangas In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit List-Id: List-Help: List-Subscribe: List-Post: List-Owner: List-Archive: Archived-At: Precedence: bulk On 02/12/2024 09:32, Thomas Munro wrote: > On Sat, Nov 23, 2024 at 10:58 AM Heikki Linnakangas wrote: >> Hmm, so this would replace the maybeSleepingOnInterrupts bitmask I >> envisioned. Makes a lot of sense. If it's a single bit though, that >> means that you'll still get woken up by interrupts that you're not >> waiting for. Maybe that's fine. Or we could merge the >> maybeSleepingOnInterrupts and pendingInterrupts bitmasks to a single >> atomic word, so that you would have a separate "maybe sleeping" bit for >> each interrupt bit, but could still use atomic_fetch_or atomically read >> the interrupt bits and announce the sleeping. > > I think one bit is fine for now. At least, until we have a serious > problem with interrupts arriving when you're sleeping but not ready to > service that particular interrupt. The 'interrupt bit already set, > don't try to wake me' stuff discussed earlier would limit the number > of useless wakeups to one, until you eventually are ready and consume > the interrupt. The main case I can think of, if we fast forward to > the all-procsignals-become-interrupts patch (which I'll be rebasing on > top of this when the next version appears), is that you might receive > a sinval catchup request, but you might be busy running a long query. > Sinval catchup messages are only processed between queries, so you > just keep ignoring them until end of query. I think that's fine, and > unlikely. Do you have other cases in mind? Yeah, no, I think one bit is is good enough. Let's go with that. > If there is legitimate use case for a more fine-grained maybe-sleeping > and I've been too optimistic above, I don't think we should give one > whole maybe-sleeping bit to each interrupt reason. We only have 32 > bit atomics (splinlock-based emulation of 64 bit atomics is not good > enough for this, it's not safe in SIGALRM handlers, at least not > without a lot more pain; admittedly the SIGALRM handlers should > eventually be replaced but not for a while) so if we used up two bits > for every interrupt reason we could handle only 16 interrupt reasons, > and that's already not enough. Perhaps we could add maybe-sleeping > bits for classes of interrupt if we ever determine that one bit for > all of them isn't enough? If we run out of bits in a single pendingInterrupt words, we can have multiple words. SendInterrupt and ClearInterrupt would still only need to manipulate one word, the one holding the bit it's setting/clearing. WaitEventSetWait() would need to touch all of them, or at least all the ones that hold bits you want to wait for. That seems OK from a performance point of view. I don't think we need to go there any time soon though, 32 bits should be enough for the use cases we've been discussing. -- Heikki Linnakangas Neon (https://neon.tech)